1. Field of the Invention
The present invention relates generally to a synchronous dynamic random access memory. More particularly, it relates to a synchronous DRAM for stabilizing a redundant operation which prevents a redundant decoder malfunction which occurs in a step of latching a redundant decoder according to a fuse programmable information during a power-up time.
2. Description of the Prior Art
Generally, in a conventional DRAM having a redundant circuit, a power-supply voltage (or Vpp) is changed by an external environment, or a plurality of address signals being input to a redundant decoder are unstable, thereby making a malfunction in the sensing and latch operations of the redundant decoder.